Bringing reality closer to your
Imagination
1
OpenCL FP Math Built-in Functions
We tremendously accelerate all 65 OpenCL floating-point (FP) math functions.
SCM (single cycle math) is a hardware floating-point math engine capable of low-latency, single-cycle throughput at high accuracy for a variety of special mathematical functions, including all functions specified by the OpenCL math library. This includes trigonometric functions, logarithmic and exponential functions, and dozens of other nonlinear and transcendental functions, including non-traditional customized instructions. The hardware design has been verified on an ASIC with a RISCV core in 28nm at 1.0 GHz.
Technologies
.
Centreon’s hardware designs have been verified on an ASIC with a RISC-V core in 28nm at 1.0 GHz.
Solutions beyond your expectations
We provide custom hardware FP functions for your applications. Each function is highly accurate with low, fixed latency.
Why Centreon?
Floating-point math computations are only becoming more and more important in our daily lives, yet only some very basic floating functions are implemented in hardware today. This is due to the lack of sufficiently optimized floating-point designs that justify the hardware area necessary to implement them.
SCM is a breakthrough in floating-point technology that changes the very scope of where floating-point hardware is applied. It breaks the wasteful paradigm of software and firmware math routines, saving time and energy in all applications to deliver the following:
Accuracy
Even small errors can compound across computations into huge ones in some applications, presenting a huge headache to software engineers. Centreon technologies solves that headache for you. Accuracy is becoming more important than ever. Some autonomous vehicle accidents may be caused by insufficient accuracy in calculations. Metaverse applications may require high-precision 3D models to avoid causing headaches.
Power Saving
SCM’s algorithms are designed from the ground-up to minimize power consumption while not significantly compromising power or speed. We provide the lowest power consumption per math function in the industry. Low power consumption also allows more SCM units to be squeezed into one chip, which is highly advantageous for SIMD and vector architectures.
Speed
Single-cycle pipelined throughput delivers one result every cycle – the pinnacle of floating-point performance.
Time critical response
