Centreon brings together 150 man-years of hardware floating-point design experience to invent patented technologies for unparalleled floating-point efficiency.
Direct hardware implementation and optimization of math functions is fundamentally different from software implementation, requiring different techniques that remain obscure and under-used.
Without SCM technology, the required gate counts for high-performance floating-point hardware are too high. Alternatives have high running costs. SIMD and other forms of parallelism can have comparable throughput, but are power-hungry and therefore expensive.
Centreon tremendously accelerates the OpenCL floating-point math functions, which are already used in a wide array of applications. On top of that, we can create custom complex FP functions designed to fit your particular needs. Either way, we guarantee our hardware always achieves the following:
1 math function = 1 native instruction
(No interim memory access)
Each function has its own fixed latency
Pipeline-able to deliver GFFPS throughput per core